31 VLSI Interview Questions & Answers With Solution Tips

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VLSI is one of the most trending technologies in this digital era. Some of the frequently asked and important VLSI interview questions are given below for preparations. Study them for good result. To build up a solid concept on VLSI and VHDL, go through our detailed guideline -listed below. VLSI Interview Questions. Best of luck for your interview!

1. What is the range of integration can be designed using VLSI technology?

Ans: VLSI technology can incorporate ICs in a range of 2000 to 20,000.

2. What is Moore’s law?

Ans: Moor’s law is one of the most significant statements that describes large-scale integration technology growth. Gordon Moor, the co-founder of Intel, predicted that the number of transistors inside an integrated cheap would be doubled every 1.5 years.

3. What is BiCMOS?

Ans: BiCMOS is one of the kinds of integrated circuits that use Bipolar Junction Transistors and CMOS to design models.

4. What is Y- Chart?

Ans: Y chart is an illustration for the representation of IC design domains. Gajski-Kuhn introduced it.

5. Name the components of FPGA architectures.

Ans: FPGA or Field programmable gate array is a specially designed integrated circuit. The interconnections are programmable to design different logics. FPGA architecture consists of –

  1. Logic block array (CLBs)
  2. Input-Output Buffers
  3. Programmable Interconnections

6. What is PLA and PAL? Write some differences between PAL and PLA.

Ans: PLA is acronym of Programmable Logic Array, and PAL is acronym of Programmable Array Logic. They are kinds of programmable logic devices.

PLA VS PAL
PAL vs PLA, VLSI Interview Questions

7. What is the condition for a CMOS inverter to be a symmetric CMOS inverter?

Ans: The logic voltage for a symmetric CMOS inverter will be equal to half of the supplied voltage (VDD).

VINV = VDD / 2

8. Name and explain the design rules of VLSI technology.

Ans: There are two types of design rules – Micron rules and Lambda rules.

Micron Rules: This rule deals with some of the important parameters like – min. sizes of features, permissible feature separations, etc.

Lambda Rules: The Lambda is the primary length unit.

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9. What is Antenna Effect regarding VLSI technology?

Ans: While the fabrication of interconnection is under process, some of the metal lines may be partially processed. Those metal lines further gather static charges inside the clot surroundings. Later, if those lines get interconnected with transistors, the previously stored charges may start discharging during operation in progress. That discharging may affect the gate oxide. This effect is known as Antenna Effect.

10. What is PLL?

Ans:  PLL is Phase Locked Loop, which can track the frequency- coming inside. PLL can also work as a clock generator.

11. What is PDN and PUN?

Ans: PDN is Pull Down Network, and PUN is Pull Up Network. They are used to design desired CMOS logic.

12. Which type of transistors are used in Pass Transistor Logic?

Ans: Pass transistor logic uses NMOS transistors to design models.

13. What is Domino CMOS logic?

Ans: Domino CMOS logic is implemented by connecting a static CMOS inverter at each dynamic CMOS logic’s output.

14. What is the full form of VHDL?

Ans: VHDL stands for – Very High Speed Integrated Circuit Hardware Description Language or VHSICHDL.

15. How many MOSFETs and BJTs are required to design a BiCMOS two-input NAND gate? Draw the circuit diagram of a two-input BiCMOS NAND gate.

Ans: To build a BiCMOS two-input NAND gate, we need 7 MOSFETs and 2 BJTs.

BiCMOS NAND GATE
BiCMOS NAND Gate, VLSI Interview Questions

16. How many MOSFETs and BJTs are required to design a BiCMOS two-input NOR gate? Draw the circuit diagram of a BiCMOS NOR gate.

Ans: To build a BiCMOS two-input NOR gate, we need 7 MOSFETs and 2 BJTs.

BiCMOS NOR GATE
BiCMOS NOR Gate, VLSI Interview Questions

17. What is ROBDD and OBDD?

Ans: OBDD is an Ordered Binary Decision Diagram, and ROBDD is Reduced Ordered Decision Diagram. These are Boolean space methodology for handling a large number of input signals.

18. Give some examples of Logic Synthesis Techniques of VLSI design.

Ans: Some of the logic synthesis techniques are – Instantiation, Macro expansion/ substitution, Inference, logic optimization, and structural reorganization.

19. What do you mean by Local-skew, Global Skew?

Ans:

Local Skew: Local skew is the change of clock to reach the launching flip-flop to reach the destination flip-flop.

Global Skew: Global skew is the alteration of first reaching flip-flop to the last reaching flip-flop.

20. What is FSM or Finite State Machines? Discuss the types of FSM.

Ans: FSM or Finite State Machines are devices consists of both combinational and sequential logic circuits. Input signals and current states help the machine to change its state.

The two kinds of Machines are –

  • Moore Machine: The FSM whose outcome is contingent upon the present state of the machine.
  • Mealy Machine: The FSM whose outcome is contingent upon the present state of the machine as well as upon the input signals.

21. What is HBM or Human body model regards to VLSI?

Ans: HBM or Human Body Module is a corresponding course to describe the electrostatic discharge models when the IC is in direct contact with the human figure.

22. What is Soft Error? What is SER?

Ans: Soft error occurs due to the striking of charged particles against the semiconductor devices. It can be described as a type of noise r glitch.

SER or Soft Error Rate is the prediction rate of a device to face a soft error.

23. Compare between FPGA and ASIC.

Ans: The comparative study between FPGA and ASIC is given in the below table.

Subject of ComparisonFPGAASIC
NAMEField Programmable Gate ArrayApplication Specific Integrated Circuit
ApplicationThe user designs the program on his ownThe user gives the description of the need; the vendor provides the required model.
Production Set-up CostsMinimal production set up cost.Relatively costlier
Turnaround TimeFaster Turnaround TimeSlower turnaround time
CapabilityLower CapabilityHigher capability and efficiency for a higher volume of production.
VLSI Interview Questions

24. What are the modes of SFF or Scan Flip Flop?

Ans: SFF or scan flip-flop has two types of operation modes. In the general model, the flip-flop function as conventional flip-flops. In the next mode or the scan mode, the flip-flops are connected so that they will work as a series of registers.

24. What is AD HOC testing?

Ans: AD HOC testing is a strategy or process to condense the number of trials from a huge set of test outlines.  It is most useful for small models where ATPG, BIST are not available.

25. What is BIST?

Ans: BIST is a Built-in self-test. It is a testing logic circuit that is placed inside a chip. BIST consists of – PRSG or pseudo-random sequence generator and signature analyser.

26. Describe Slew Balancing.

Ans: Slew is a basic term related to the rise and fallen time of the input and output waveforms. Rise time is known as rising slew, whereas fall time is known as fall slew. Slew balancing is the process of making the rise slew and fall slew equal. To do so, the corresponding resistances of the transistors are kept equal.

27. Why CMOS is preferred over BJT in VLSI designs?

Ans: CMOS technology is preferred over BJTs for VLSI designs. Some of the reasons are –

  • CMOS has lower power indulgence.
  • CMOS uses lower area
  • Scaling of CMOS is easier than that of BJTs.
  • CMOS has a lower fabrication cost.

28. State some of the DSM issues.

Ans: Some of the DSM or deep sub-micron issues are – interconnect RC delays, IR drop, induction effects, antenna effects, capacitive and inductive coupling, etc.

29. What is the package of VLSI design?

Ans: Package: It is basically the storage of various datas. VHDL packages typically made up of Declaration and Body of the packages.

30. What are the future technologies of VLSI?

Ans: Future technologies of VLSI are – ULSI (Ultra Large Scale Integration) and GSI (Giga- Scale Integration). ULSI has a range of – 100,000 gates to 1,000,000 gates per IC, and GSI has a range greater than 1,000,000 gates per IC.

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VLSI Design Flow Of Logic Circuits & 5 Important Facts

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Introduction to VLSI Design Flow

In the previous article, we have got an overview of VLSI design flow. In this article, we will learn about how different logic circuits can be implemented using VLSI design. VLSI is one of the key technologies in this era of digitalization. Transistors are used to implement logic circuits in VLSI design.

Digital logics are three types – the Inverter of the NOT gate, the AND gate, and the OR gate. More complex gates like -NAND, NOR, XNOR, and XOR can also be made using the basic gates. Let us discuss some of the methods of implementation of logic circuits.

CMOS Logic Design

Digital is everything about ZERO and ONE or HIGH or LOW. The input for a digital logic circuit will be either 0 or 1, so as the output value. Now, if a circuit takes input as 0 and 1, then the logic can be understood by the switch function as given-below.

VLSI Design Flow
Switching Operation for VLSI Design Flow

We can see in the image that when the s1 switch is opened and the s2 switch is closed, then the output will be 0; for vice versa, the output will be 1.

VLSI Design Flow 2
Complementary Push-Pull structure, VLSI Design Flow
VLSI Design Flow 3
A CMOS logic implementation; PUN – Pull Up Network; PDN – Pull Down Network, VLSI Design Flow
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CMOS Design Methodology

There are three steps for designing a CMOS logic as a part of VLSI design flow.

  1. Find out the complement of the Boolean Expression you need to implement.
  2. Describe the PUN
  3. Describe the PDN

The Pull Up Network Design:

Multiplying terms: NMOSFETs in parallel connection

Additive Terms: NMOSFETs in series connections

The Pull-Down Network Design:

Multiplying terms: NMOSFETs in series connections

Additive Terms: NMOSFETs in parallel connections

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CMOS Inverter / CMOS NOT Gate Design

A digital inverter is a NOT gate that gives the inverted output for an input. For high input or input is digital ONE, then the output is low or digital ZERO. For low input or input is digital ZERO, then the output is high or digital ONE.

INPUTOUTPUT
HIGHLOW
LOWHIGH
NOT gate truth table / Inverter truth table, VLSI Design Flow

A CMOS inverter is made of two enhancement-mode transistors – one is NMOS, and the other is PMOS. The NMOS works as a pull-down network, and the PMOS works as a pull up network. The input voltage controls both the transistors.

When the PMOS transistor is in the ON state, the NMOS transistor goes into the OFF state. Also, when the NMOS transistor stays OFF, the PMOS will be in an ON state. That is how both the transistors work in complementary mode.

The transistor, which remains in OFF state, provides a high impedance value, and the output value changes. Under the same rail, a CMOS logic-circuit has less noise than an NMOS logic-circuit.  

The graph of the voltage transfer characteristics of a symmetrical CMOS is given below.

Voltage Transfer Charecteristics
Voltage transfer characteristics of a symmetrical CMOS, VLSI Design Flow

Operation

The transistors are made in such a way that their threshold voltages should be of equal magnitude and opposite polarity. That is, the threshold voltage of NMOS will be equal to the magnitude of the threshold voltage of PMOS, given by the below expression.

VTN = – VTP

When the input voltage (Vin) is smaller than the threshold voltage of the NMOS transistor, then the NMOS transistor is in an OFF state. Then, the PMOS circuit will control the output voltage (Vout) with the supplied voltage (VDD). The AB region of the graph represents this operation.

Now, when the input voltage is greater than the difference of VDD and threshold voltage, then the PMOS logic circuit enters into an OFF state, and the NMOS gets activated. Then, NMOS controls the output voltage (Vout) with the ground voltage that is 0 V.

The graph’s BC region represents the saturated NMOS, and the CD part represents both the transistors are in saturated mode. VINV is the input voltage value for which the input voltage equals the output voltage.

From careful observation, we can say that the change is very high-pitched for the voltage swipe from 0 to VDD. That is why the CMOS inverter is a perfect inverter for logic design.

Now, when the input voltage is equal to the VINV, both the transistors are in saturation. The pull up network (PUN) will have VGS value =

VGS = Vin – VDD

Or, VGS = VINV – VDD 

Current equation for saturation region is given as –

ID = μεW * (VGS – VTH )2 / 2 LD

This equation can be rewritten for pull up network–

 IDpu = μpεWpu * (VINV – VDD   – VTHP)2 / 2 D Lpu

The equation for pull down network will be –

IDpd = μnεWpd * (VINV – VTHN )2 / 2 D Lpd

Equating the drain current as per the characteristics –

μnεWpd * (VINV – VTHN )2 / 2 D Lpd = μpεWpu * (VINV – VDD   – VTHP)2 / 2 D Lpu

or, VINV – VDD   – VTHP = – β (VINV – VTHN) ; [ β = (μn * Zpu / μp * Zpd) ½]

Or, VINV = (VDD + VTHP + β * VTHN) / (1 + β)

If VTHN = – VTHP, then β comes as 1.

Furthermore, VINV comes as VDD/ 2 and

Zpd : Zpu = μn : μp =~ 2.5 :1

Power Dissipation

CMOS logic-circuits dissipate less power than that of an NMOS logic-circuit for low frequency. The CMOS power degeneracy swings as per the switching frequency of the circuit.

Noise margins

Noise margin is the maximum allowable deviation that can be occurred without changing the main feature under noisy conditions. NML is given as the difference between the logical threshold voltage and the logic ZERO equivalent voltage for a CMOS inverter of low level. The noise margin is described as the difference between the logic high or ONE equivalent voltage and the logical threshold voltage for the high level.

CMOS two input NAND and NOR gates

NOR and NAND gates are known as universal logic gates, which can be used to implement any logic equation or any kind of other logic gates. These are the two most manufactured gates using the CMOS logic for VLSI technology. Let us discuss the implementation and design of both the gates using CMOS logic.

CMOS NOR gate

A NOR gate can be described as an inverted OR gate. The truth table of the NOR gate is given below, where A and B are the inputs.

NOR GATE TRUTH TABLE 1
NOR Gate Truth Table, VLSI Design Flow

A NOR gate can also be implemented using CMOS technology. The CMOS inverter circuit comes into work in this design. A pull-down network (transistor) is added with the basic CMOS NOT gate in a parallel connection to implement the NOR operation. For two input NOR gates, only one pull-down network is added. To incorporate more numbers of inputs, more transistors are added.

Operation

The logic implementation using CMOS is shown in the below image. When any of the inputs is logic high or logic ONE, then the pull-down way to the ground is locked. The output will be logic ZERO.

When both the inputs get HIGH voltage or logic – ONE value, then the output value will be logic high or ONE. The logical threshold voltage will be equal to the threshold voltage of an inverter. That is how NOR logic can be achieved using CMOS.

PMOS NOR gate
PMOS NOR Gate, A & B are the inputs, Y is The Output; VLSI Design Flow, Image Credit – KenShirriffPMOS-NOR-gateCC BY-SA 4.0

CMOS NAND gate

A NAND gate can be described as an inverted AND gate. The truth table of the NAND gate is given below, where A and B are the inputs.

NAND GATE TRUTH TABLE
NAND gate truth table, VLSI Design Flow

A NAND gate can also be implemented using CMOS technology. The CMOS inverter circuit also comes into work in this design. A pull-down network (transistor) in series and a depletion mode transistor are added with the basic CMOS NOT gate to implement the NAND operation. For two input NAND gates, only one transistor is added. To incorporate more numbers of inputs, more transistors are added to the series connection.

Operation

CMOS NAND
CMOS NAND Gate, VLSI Design Flow; Image Credit – JustinForceCMOS NANDCC BY-SA 3.0

The logic implementation using CMOS is shown in the above image. When both the inputs are logic ZERO, both the NMOS transistors are in OFF state, while both the PMOS transistors are in ON state. The output gets connected to VDD, and that is how the output provides logic ONE or high value.

When input A gets a high value as input, and the input B gets a low value, the upside NMOS goes into ON state, and lower NMOS goes into OFF state. The ground connection cannot be established with the output value. In this condition, the left PMOS gets ON, whereas the right PMOS stays in the OFF state. The VDD finds a path through output and provides a high output value or logic 1.

When input B gets a high value as input, and input A gets a low value, the upside NMOS goes into OFF state, and lower NMOS goes into ON state. The ground connection cannot be established with the output value. Also, in this condition, the left PMOS gets OFF, whereas the right PMOS goes into the ON state. The VDD finds a path through output and provides a high output value or logic 1.

For the final logic, when both the input gets high input voltage or logic ONE value, both the NMOS transistors are in ON state. Both the PMOS transistors are in OFF state, providing a path for the ground voltage to connect with the output. The output thus provides logic ZERO or low value as output.

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VLSI: Definition,Design,Important Rules And Scaling

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A. What is VLSI?

To know about VLSI, we have to know about IC or integrated circuit. An IC is a chip or a processes package which contains transistors or digital circuits in lakhs of number.

VLSI or very large scale integration refers to the process to incorporate transistors (especially MOS transistors) to formulate IC.

VLSI devices consist of thousands of logic gates. They help to create big memory arrays .The arrays are used in microcontroller and microprocessors. It is possible to incorporate 104 to 109 components in a single chip in standard VLSI designing technique.

B. History and background of VLSI

The very first transistor was invented in the year 1947 by J. Barden, W. Shockley, W. Brattain in the Bell Laboratories. All three scientists got noble for the invention in the year 1956. The transistor size got reduced with progress in time and technology.

Jack Kilby and Robert Noyce came up with the idea of IC where components are connected within a single chip. This helped engineers to increase the speed of the operation of various circuits.

Moor’s Law: In the year 1998, Intel Corporation’s co-founder Gordon Moor predicted a trend on the number of components in an integrated circuit.

He predicted that –

“The transistor number inside a microchip gets doubled in every two years”.

The trend is followed with some exceptions.

750px Moores Law Transistor Count 1970 2020
Graph showing how the world has followed Moor’s Law, Image Credit – Max Roser, Hannah Ritchie, Moore’s Law Transistor Count 1970-2020CC BY 4.0

The progress of integrated circuits leads to the discovery of very large scale integration or VLSI technology. Before the VLSI get invented, there were other technologies as steps. They are discussed below.

  • SSI or Small Scale Integration: These type of integrated circuits contains less than ten logic gates. These IC gates have several gates or flip-flops associated with one package.
  • MSI or Medium Scale Integration: These packages contain ten to thousand logic gates. MSI ICs can generate basic logic gates. The logic gates can be further used for making sequential and combinational circuits like – mux-demux, encoders-decoders, latch, flip flop, registers, etc.
  • LSI or Large Scale Integration: LSI units contain more than one hundred gates. LSI ICs creates more complex circuit structures like – calculators, mini-computers, etc.
  • VLSI or Very Large Scale Integration: Contains thousands of logic gates.
  • ULSI or Ultra Large Scale Integration: A single chip contains more than 10^9 components.

An overview of transformation is given below.

VLSI DIFFERENT SCALINGS
Different range for scale-integration design (in standard VLSI design > 10000 gates per IC are used )

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C. VLSI Design

A VLSI design has several parts. It needs right and perfect physical, structural, and behavioural representation of the circuit. Redundant and repetitive information is omitted to make a good artwork system. It is achieved by using graphical design description and symbolic representation of components and interconnections.

VLSI architectures use n-channel MOS field-effect transistors and complementary MOS. Complementary MOS or CMOS need both the n-channel and p-channel MOS FETs to be fabricated in the same substrate.

In the 1980s, the demand for increasing package density grew up, and it affected the power consumption of NMOS ICs. The power consumption became so high that the dissipation of the power posed a serious problem. To resolve the issue, the CMOS technology emerged as a solution.

CMOS provides high input impedance, high noise margin, and bidirectional operation. That is why it works smoothly as a switch.

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D. Transistors in VLSI Design

The Metal Oxide Semiconductor Field Effect Transistor or MOSFET is the key component in high-density VLSI chips.

Why is FET used in VLSI?

FET or Field Effect Transistors are probably the simplest forms of the transistor. FETs are used widely in both analogue and digital applications. They are separated by a large value of input resistance and smaller area and size, and they can be used to form circuits with low power consumption. That is why they are widely used in very large scale integration.

CMOS and n-channel MOS are used for their power efficiency.

Characteristics of NMOS Transistors

1024px IGFET N Ch Enh Labelled.svg 1
Symbolic representation of NMOS FET, Image Source – anonymous, IGFET N-Ch Enh Labelled, marked as public domain, more details on Wikimedia Commons

An NMOS field effect transistor is shown in the above image with the drain current and terminal voltage representations. For an NMOS FET, the source and drain terminals are symmetrical (bidirectional).

When there is no charge on the gate terminal, the drain to source path acts as an open switch. As a thin oxide layer separates the gate from the substrate, it gives a capacitance value. When the gate terminal accumulated enough positive charges, the voltage VGS exceeds a threshold voltage VTH. Thus, electrons are attracted in the region under the gate to give a conducting path between the drain and the source.

The gate voltage enhances the channel conductivity by entering into the enhancement mode operation. VTH ~= 0.2 VDD gives the VTH.

The majority carrier for this type of FET is holes. When the positive gate to source voltage or VGS is smaller than VTH, the majority carrier or holes are repelled into the substrate. Now, on the surface of the p-type there is no carrier. There is no current because of the depletion region.

Now, when the gate to source voltage get higher than the threshold voltage, a healthy amount of minority carriers gets attracted to the surface (Which in our case is the electron). Thus, a channel is formed of inversion layer between the source and drain terminal. 

The below expression gives the drain current ID.

ID = Charge induced in the channel (Q) / transit time (τ)

The charge transit time τ is the time taken by a charge carrier to cross the channel from the source terminal to drain terminal. For small value of VDS,

τ = Drain to source distance (L) / Electron drift velocity (vd) = L / μ E = L2 / VDS μ

E is the electric field and given as, E = VDs / L.

μ is the electron mobility. We have said earlier that there is a capacitance value that generates. The capacitance is given as C = εA / D = εWL / D

W is the width, while D is the thickness of the di-oxide layer. ε represents the permittivity of the oxide layer. For silicone di-oxide, the ratio of ε / ε0 comes as 4. The charge in transit is –

Q = C (VGS – VTH – VDS/2) = (εWL / D) * (VGS – VTH – VDS/2)

The drain current is given as – ID = Q / τ  = (μεW / LD) * (VGS – VTH – VDS/2)VDS

The resistance will be R = VDS / ID = LD / [ μεW * (VGS – VTH – VDS/2)]

The output characteristics of an NMOS transistor is shown in the below graph.

vLSI Design
Output characteristics of an NMOS transistor

In the saturation region, the drain current is obtained as –

ID = (μεW / 2LD) (VGS – VTH)2

NMOS transistors can also be fabricated with the values of the threshold voltage VTH < = 0. The transistors are referred to as depletion-mode devices.

E. VLSI design rules

VLSI designing has some basic rules. The rules are specifically some geometric specifications simplifying the design of the layout mask. The rules provide details for the minimum dimensions, line layouts and other geometric measures which are obtained from the limits of certain dispensation expertise.

These rules help the designer to design a circuit in the smallest possible area that too without compromising with the performance and reliability.

There are two sets of design rules.

  • Rule of Micron The rule evolves around implementation constrains such as – minimum feature size, smallest allowable feature separations. They are quoted with respect to micro-meter ranges.
  • Design rules based on Lambda: the constraints on the distance in the layout are expressed in terms of primary length unit lambda. The rules were developed to simplify the industry-standard micron rules. This allows scaling the capability for different processes. The length unit lambda is the distance by which the geometrical feature of a layer may overlap with that of another layer, and is determined by the limitations of the process technology.

If the length unit is lambda, then all widths, spacings and distances are expressed as m*lambda. M is the scaling factor. The diffused region has a scaling factor of a minimum of 2 lambdas. As per safe thumb rule, diffused regions, which are unconnected, have a separation of 3 lambdas. Metal lines have a minimum width and separation of 3 lambdas in standard VLSI Design.

F. Scaling in VLSI Design

The progress in technology allows us to reduce the size of the devices. This process of size reduction is known as scaling. The main advantages of scaling VLSI Design are that, when the dimensions of an integrated system are scaled to decreased size, the overall performance of the circuit gets improved. Other objectives of scaling are – larger package density, greater execution speed, reduced device cost.

Some of the most used scaling models are –

  1. Constant Electric Field Scaling
  2. Constant Voltage Scaling.

For the constant electric field, the nonlinear effects are eliminated as the electric field of the circuit remains the same. To understand the scaling in the VLSI Design, we take two parameters as α and β. For constant electric field, β = α and for voltage scaling, β = 1.

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VHDL Process & Installation Guide: 3 Important Facts

Topics of Discussion

1. VHDL Process using Xilinx

2. Steps to Install Xilinx

3. Step by Step Examples for implementation of Sequential & Combinational Circuits.(VHDL Process)

Tutorial with a step-by-step guide for VHDL Process

VHDL Process Using XILINX

To implement VHDL designs, we will use Xilinx. Xilinx is one of the best providers of programming logic devices. It is a tech company based on states.

Prerequisite for using VHDL:

WHAT IS VHDL ? Check Here!
  • Must have some knowledge of digital electronics. <You can check out some articles here!>
  • It is good if you have an uninterrupted internet connection for downloading the files.
  • Xilinx needs at least 18 GB of space in your PC. So make sure that your disk has enough space to run the application.
  • Make sure you have created a free account with a valid email id in Xilinx before downloading. That will help you in future purposes.
  • We are using windows.

Installation Guide for VHDL Process

  • Step 1: Download the zip file according to your operating system and their versions.

The link to download Xilinx is given below.

https://www.xilinx.com/member/forms/download/xef.html?filename=Xilinx_ISE_DS_Win_14.7_1015_1.tar

It is 6.18 GB free zipped file. We will use this version to demonstrate the tutorial.

You can find other downloadable options from here –

https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vivado-design-tools/archive-ise.html

  • Step 2: Unzip the file and store that in a preferred folder. The folder name should be – Xilinx_ISE_DS_Win_14.7_1015_1. Open this folder.
  • Step 3:  Double click on the xsetup file (as shown in the image) and start the installing. Allow all the permissions . The installation may take up to two hours depending on the memory space available and the PC configurations. Nothing to worry, sit tight and get it installed.
IMAGE1 1
Choose the ISE Webpack

Choose the ISE webpack from the list when this pop up appears before final installation. Also, keep the default storage space as it suggests and if that location has enough space.

IMG1 1 1024x576 1
Choose the xsetup file.

 After the installation of the file, there will be two shortcuts appearing in the desktop, and there will be a pop-up regarding the license. Don’t click on the shortcut icons as the installation is not completed and also close the license tab for the time being.

  • Step 4: Now, the software is installed inside your computer. Find out the installed folder which is of around 18 GB of size. By default, it gets stored in C drive if you have not made any changes. Open the folder.

Open Xilinx folder -> 14.7 -> ISE_DS -> lib -> nt64

Path – [C:\\Xilinx\\14.7\\ISE_DS\\ISE\\lib\ t64]

  • Step 5: Now there will be a file named – “libPortability.dll”

Rename that file as – “libPortability.dll.orig”

  • Step 6: Then find out the file named as – “libPortabilityNOSH.dll”. It will be just below the file we worked in step 4. Copy the file and paste it. Now rename that pasted file as – ‘libPortability.dll”. Keep the copied file in the dashboard.

The final outcome will look like the below-given figure.

IMG3 1024x576 1
The final result will be same as the marked ones.
  • Step 7: After that, we have to go to another file-folders.

Open Xilinx folder -> 14.7 -> ISE_DS -> common -> lib -> nt64

Path – [C:\\Xilinx\\14.7\\ISE_DS\\common\\lib\ t64]

There will be a file named as – “libPortability.dll”.

Rename that file as – “libPortability.dll.orig”

  • Step 8: Now, paste the file that we have copied in step 6 and rename that pasted file as – ‘libPortability.dll”.

The final outcome will look like the below-given figure.

IMG4 1024x576 1
Final result for step 8 of VHDL Process
  • Step 9: License: Now double click on the shortcut ISE Design Suite 14.7. There will be a pop-up asking for a license. Just click Okay, and another window will be opened. There will be options for the license. From the “Acquire license”, click on the “Get My Purchased License (s)” and then NEXT.
IMG5 1 1024x529 1
Click on the Get My License in the VHDL Process of Step 9

Then, there will be another pop-up from “Xilinx License Manager”. Click on the connect now option. It will open a tab on the default web browser of your PC.

Log in with your credentials, and there will be options like the below image. You have to choose the 4th or 5th option from the list. Just click on the license you want.

There will be a mail in your email id, containing the license file for Xilinx. Download the license file and store it into the download folder.

IMG6 1 1024x389 1
Select the 4th or 5th option from the list
  • Step 10: Go back to the ISE. There you can see a window remained open. Choose the option load license and locate your license in the download folder to upload.
IMG7 1 1024x535 1
Upload the license which you have downloaded.

After uploading the license, there will be a message showing successfully. Click Ok and then click close in the previous window. Now Xilinx is ready to be used.

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Now we are ready for making the first project using VHDL Process

Creating your first project in XILINX (VHDL Process)

We will implement a simple AND gate dataflow modelling using Xilinx.  AND gate is represented as – Y= AB. The truth table is shown below.

ABY =AB
000
010
100
111
Truth Table for AND Gate
  • Step 1: Open the project navigator by double-clicking the icon on the desktop.
  • Step 2: Go to File and then New Project. File -> New Project
IMG9 1
Choose the New Project from File, VHDL Process ,Step 2
  • Step 3:  Give a name to your project and select the location to store the project. Never uses basic gate names. Then click on the next. Copy the name, and it will help later.
IMG10 1024x576 1
Give a name to your project, VHDL Process, Step -3
  • Step 4: Now set up the values as mentioned below. Do the setup carefully. Any mistake will lead to failure.
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Edit and fill up the details, VHDL Process, Step -4

Click on the NEXT and then click on ‘Finish’ For the next pop-up.

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VHDL Process, Step -4
  • Step 5: Now, in the editor section, you can see your model at the left top corner, inside the design tab and under the Hierarchy bar. Place your cursor on the folder named by you and do a right-click. Then Choose the New Source from the menu.
IMG12 1024x576 1
VHDL Process, Step – 5
  • Step 6: In the new window, choose the VHDL Module and paste the same name that you have copied in step 3, or you can get the name from the location tab. Click on next.
IMG13 1
VHDL Process, Step – 6
  • Step 7: In the define module pop-up,
  • Change the Architecture from ‘Behavioral’ to ‘Dataflow’.
  • In the Port Name, Write A, B, and Y in the consecutive rows. Now for The Y marked row, Choose the direction as ‘out’ as it will be the output. You can change the direction from the down arrow associated with it.
  • There will be another pop-up. Check if the porta is okay or not. Then click finish.
IMG14 1
Defining Ports, VHDL Process, Step 7
  • Step 8: RTL SCHEMATIC CREATION

Now a code editor will be opened.

A. In the 40th line, you can ‘begin’. From that place, you have to write the dataflow code. The Code for our program will be –

Y <= A and B;

B. Save the code using Ctrl + S.

C. Now, on the left side of the window, under the design bar, you can see a tab named ‘process < model_name>’.

D. Expand the ‘Synthesis – XST’ from there.

E. Double click on the ‘Check Syntax’. It will show a green tick, denoting success.

F. Then, Double click on the ‘Synthesis – XST’. A green tick will have appeared here too.

IMG15 1024x655 1
Synthesis Check, VHDL Process, Step – 8

G. Now click on the ‘View RTL Schematic’ to view the RTL implementation. A pop up will appear. Choose the second option and click on the next.

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Selection of the second option

H. A diagram segment will be opened up.

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RTL Schematic – 1

I. Double click on the box to show the inside structure.

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Final RTL Schematic
  • Step 9: TEST BENCH CREATION
  1. Change the tab from Implementation to Simulation.
IMG19 1
The default option is Implementation- click on simulation
  1. Again, right-click on the first folder and choose the new source.
IMG20 1
Choose the new source
  1. Choose the ‘VHDL Test Bench’ and give a new file name. Click on the next.
IMG21 1024x574 1
Choose the VHDL Test Bench And give a name to the test bench file
  1. After that, a window named Associate Source will be popped up to link your dataflow model with the test bench. Click on the model and click NEXT. Click on ‘Finish’ for the next window.
IMG22 1
Link the existing dataflow model
  1. A new code editor will be opened up.

Now, for an AND gate, we don’t need clock pulses. To delete or comment all the clock signals.

The clock signals are at line no. – 60, 72 to 78 and line no. 87.

Test bench code is written in the ‘Stimulus process section’.

You can start from the 90th line.

 The code for test bench of AND gate is –

A <= ‘0’;

               B <= ‘0’;

               wait for 100 ns;

               A <= ‘0’;

               B <= ‘1’;

               wait for 100 ns;

               A <= ‘1’;

               B <= ‘0’;

               wait for 100 ns;

               A <= ‘1’;

               B <= ‘1’;

               wait for 100 ns;

6. Now from the left side option, expand the Isim Simulator, and then double click on the ‘Behavioral Check Syntax’. A green tick will appear.

IMG23 1
Click on the Behavioral check syntax for the final outcome

7. Now double-click on the ‘Simulate Behavioral Model’.

A window will be popped up. allow the software to access.

On the toolbar at the top, find out the option of zooming. Click on the third option to see the full view.

VHDL Process
Final waveform, Last step of VHDL Process

Click Here to Know About the VHDL CODING PROCESS!

VHDL Tutorials: 13 Important Concepts

vlsi vhdl tutorials design principle 0

In this VHDL Tutorial, we will discuss some of the basic concepts related to VHDL technology and few example with coding. VHDL Tutorial is segmented as follows :

TOPICS OF DISCUSSION

A. What is VHDL?

B. History and Standardization

C. VHDL Design Procedures

D. Some rules and basic information about VHDL

E. Syntaxes & Some important concepts for writing VHDL Codes

F. VHDL Simulators for VHDL Tutorial

VHDL || What is VHDL?

The full form of VHDL stands for Very High Speed Integrated Circuit Hardware Description Language (VHSIC-HDL).

As the name suggests, VHDL is a hardware description language or a special type of programming language which describes the hardware implementations of digital system and circuits.  It is a strongly typed language and points to be remembered that it is not a programming language.  

History and Standardization

US Defense Department has a significant contribution to the modern technological field. It has given birth too many great ideas and innovations. US Defense also developed VHDL in the year 1983. It was developed for documentation of behavior of the application specific integrated circuits.

Later, some ideas were implemented from Ada programming languages. VHDL got standardized for the first time in the year 1987. It was added up with several data types of several types, including strings and numeric and logical.

Standardization

VHDL or for Very High Speed Integrated Circuit Hardware Description Language (VHSIC-HDL) is standardized by IEEE 1076 standard. It is being updated from its birth and has undergone many revisions. Let us look at some of the standard revisions and major updates.

RevisionsUpdates
IEEE 1076 – 1987Revision and standardization from US Defense.
IEEE 1076 – 1993Came up with the greatest release, and it is the most widely used version.
IEC 61691 -1 – 1- 1: 2004IEC adopted IEEE 1076-2002 Version
IEEE 1076 -2008Updated with some major changes like – Introduction of generics on packages and use of external names
IEC 61691 -1 – 1- 1: 2011IEC adopted IEEE 1076-2008 Version
Check the standardization here, VHDL Tutorial Table – 1

Design of VHDL

VHDL design has some design units. They are known as – Entity, Architecture, Configuration, and Package.

Entity: Entity defines external views of a model that is a symbol.

Architecture: Architecture defines the functionality of a model that is schematic.

Configuration: Configuration is used for associating architecture with an entity.

Package: Package is the collection of information which can be referenced by VHDL modules. A VHDL package consists of two part. They are – package declaration and package body.

1200px Vhdl signed adder source.svg
A basic code designed in VHDL Tutorial, Image Credit – Vhdl_signed_adder.pngRevRagnarok derivative work: Bernard LadenthinVhdl signed adder sourceCC BY-SA 3.0

Entity Declaration

The general structure of entity declaration is given below –

ENTITY < entity_name > IS

          Generic declarations

          Port declarations

END ENTITY <entity_name>;

  • <entity_name> can be alphabetic/ numerical or alpha-numerical.
  • Generic Declarations is for passing information into a model.
  • Port Declarations is for describing the inputs and outputs pins.
  • An entity can be closed in several ways.
    • END ENTITY <entity_name>;
    • END ENTITY;
    • END;

Port Declarations

A general structure for port declarations is given below –

ENTITY < entity_name > IS

          Generic declarations

          — Port Declarations:

PORT (

          SIGNAL CLK, CLR: IN BIT;

          q: OUT BIT

          — note that there is no semicolon in the last line of declarations.

          );

END ENTITY <entity_name>;

The structure of port declaration: <class> object_name : <mode> <type>;

  • Class: Class is what can be done to an object. Here class is signal. A point to be remembered that the SIGNAL is not written while writing program; rather, it is assumed and not required.
  • Object_name: It is the identifier.
  • Mode: It specifies the direction.

IN – Input

OUT – Output

INPUT – Bidirectional

BUFFER – Output with internal feedback

  • Type: Type specifies what can be contained inside an object.

Generic Declarations

A general structure of generic declarations is given below –

ENTITY <entity_name> IS

          GENERIC (

                    CONSTANT tplh, tphl : time := 5 ns;

                    tphz, tplz : TIME := 3ns;

                    default_value : INTEGER := 1;

                    cnt_dir : STRING := “UP”

                    — note that there is no semicolon in the last line of declarations.

                    );

          Port declarations

          END ENTITY <entity_name>;

  • Generic values can be overwritten during compilation.
  • Generic must possess the tenacity to a constant during the compilation of a program.  

Note that CONSTANT keyword is assumed and not required to write.

Architecture

  • Analogy-schematic: Analogy schematic gives the description of the functionality of a model and the timing associated with it.  
  • The architecture of a model should be associated with an ENTITY.
  • An Entity may have many architectures associated with it.
  • Architecture statements execute concurrently.
  • Some styles of architecture –
  • Behavioural: Behavioural model describes how designs operate.

RTL: RTL describes how designs can be implemented using registers.

Functional: It includes no timing.

  • Structural: Implementation of gate level structure.
  • Dataflow: Implementation of the truth table.
  • Architecture is ended with –
    • END ARCHITECTURE <architecture_name>;
    • END ARCHITECTURE
    • END;

A general structure of writing an architecture:

ARCHITECTURE <identifier> OF <entity_identifier> IS

          SIGNAL signal_1 : INTEGER := 1;

          CONSTANT cnst := BOOLEAN := true;

          TYPE process IS (W, X, Y, Z);

          — Attribute declarations

          — Attribute specifications

          — Subprogram declarations

          — Subprogram body

BEGIN

          Process statements

          Concurrent procedural calls

          Signal assignment

          Generate statements

END ARCHITECTURE <identifier>;

IMG18 1024x576 1
RTL Schematic of an AND Gate, from VHDL Tutorial

Configuration     

As discussed, an earlier configuration is used for associating architecture with an entity. Associating or combining is necessary because An ENTITY can not work until the architecture is associated with it.  A general structure of configuration is given below.

CONFIGURATION  < identifier > OF < entity_name > IS

          FOR < architecture_name >

                    FOR < instance_name > : < component_name > USE < entity >(< architecture >)

                    END FOR;

                    FOR < instance_name > : < component_name > USE < configuration_name >

                    END FOR;

          END FOR;

END CONFIGURATION < identifier >;

Packages

VHDL packages are one whole unit of an entire system. It is the main aim of the implementation of VHDL. A package has two parts. As said earlier, package declarations and package body make a complete package.

VHDL delivers two in-built packages.

Some rules and basic information about VHDL Tutorial

Let us discuss about have a glance at some basic information before we dive to explore the VHDL tutorial.

1. Reserved Keywords: VHDL has some keywords as reserved (that cannot be used for declaring a variable).

2. Parts: VHDL has two steps or parts for the creation of a model. One is Simulation, and the other is synthesis and simulation.

3. Case sensitive language: VHDL is not a case sensitive language (for the most of the part).

4. Commenting: To comment a statement in the VHDL code editor, start the sentence with –, for an example:

— This is a comment in VHDL.

5. Termination: VHDL codes and each single lines of codes are terminated using a semicolon (whenever needed). 

6. Space Sensitivity: VHDL is not white space sensitive.

Syntaxes and Some important VHDL Tutorial concepts for writing a VHDL Codes

  1. Array with examples
  2. Process with examples
  3. IF – THEN – ELSIF implementation with examples.
  4. CASE statement
  5. FOR LOOP

A. Array

Array stores value. It is a user-defined data type to store value. An array may contain variables of signal, constants type.

A general structure to declare an array is given below:

TYPE array_name IS ARRAY (range) OF data_type;

For an example,

TYPE lambdageeks IS ARRAY (0 to 9) OF std_logic_vector (0 UPTO 9);

B. Process Statement

Process is a simultaneous and synchronized statement. It introduces the chronological statements. Multiple processes run parallelly if the model needed.

A process consists of two parts. They are the execution of the process and then wait for the next condition.

SYNTAX:

process sensitivity_list

          declarations

begin

          chronological_statements;

end process;

C. IF – THEN – ELSIF implementation

These statements are used for implementing a condition and for their result.

An if condition can have an infinite number of branches as per the requirement. A considerable number of elsif condition is also possible. But, in an, if loop, there can be only one else condition. An if loop is terminated by the end if statement. If the condition is given is true, then it will enter the loop and will execute the statement. If it fails, then go for else or elsif statement.

The syntax of the statements is given below.

SYNTAX

          if conditional_boolean_expression then

                    statement1

          elsif conditional_boolean_expression then

                    statement2

          . . .

          else

                    statement3

          end if;

D. CASE Statement

Case statement finds out which statement will be executed. A case statement can also be branched as IF-ELSE loops.

SYNTAX

[label]: case < conditional-expression > is

          when < choice> = >

                    statement1

          when <choice> = >

                    statement2

          …

          when <choice> = >

                    statement

end case [label];

E. FOR Loop

A for loop is a continuous execution of statements according to the bounding conditions.

For each FOR loop, we need an iterator which will perform the operations in the for a loop. It is also known as an identifier. It is an integer by default and no need to declare the iterator. It is one of the most commonly used loops for making complex models. It is more familiar than while loops.

SYNTAX

[label]: for iterator in range loop

          Statement1

          Statement2

          …

          Statement n

end loop [label];

VHDL Simulators for VHDL Tutorial

Some of the famous VHDL simulators used for the implementation of VHDL are listed below.

  1. Xilinx Vivado: The most famous simulator for VHDL is Xilinx Vivado. Xilinx provides programmable logic devices. We will use this simulator for the next part of the VHDL Tutorial. 
  2. Cadence Incisive: The previous version was known as NC-VHDL.
  3. VHDL Simili: Symphony EDA develops it. It is free for consumers. 
  4. GHDL: One of the famous free VHDL simulator. 
  5. Boot: Freerangefactory organization developed the simulator. 
  6. NVC: Nick Gasson developed the opensource VHDL compiler. 
  7. EDA Playground: Another free version based on web-browser. 
  8. Synopsis VCS-MX.
Simulators for VHDL, We will use XILINX for our VHDL Tutorial Image Credit – ™/®Xilinx, Inc., Xilinx logo, marked as public domain, more details on Wikimedia Commons

Make your first project using VHDL. Check out the next part of VHDL Tutorial.

For more electronics related article, Click here!

What Is Raspberry Pi Drone: 11 Facts You Should Know

Raspberry Pi Rover 300x169 1

Points for Discussion

A. Application in Education

B. Application in Home Automation

C. Application in Industrial Automation

D. Pi as AI Assistant (Raspberry Pi Alexa)

E. Photography Applications

F. Raspberry pi drone and Raspberry pi drone peripherals

G. Raspberry Pi camera

H. Octoprint Raspberry Pi

Various Applications of Raspberry Pi

Raspberry pi is considered as one of the greatest inventions. It is one of the hot-selling electronics devices in today’s world. From taking images of planets in night using raspberry pi cameras to controlling the washing machine in your home , Raspberry pi drone is using in advanced drones also. Do. Raspberry pi is now literally the ‘Jack of all trade’. But the tiny computer is not trying to replace the conventional computing machines but assisting the machines like never before!

It’s versatility of shape and size and dynamic nature of operation helps to implement innovative ideas in a simple way and through shorter process. Out of in numerous numbers of applications, we will discuss about some common applications which are appreciated and adapted by tons of people (the range of people lies from – 8th standard student to NASA scientists!). At first, we will discuss about the uses of raspberry pi by dividing its uses in separate fields then we will be more specific.

Raspberry Pi Rover
Raspberry Models Used By Nasa for their ROVER, Image Source – NASA/JPL-Caltech, NASAJPLOpenSourceRover, marked as public domain, more details on Wikimedia Commons

What is Raspberry Pi? How it works? Read Here

A. Education

Raspberry pi helps the students to grow interest in the modern technological domains. They come up with different innovative ideas and some of them are just mind blowing. There are various communities to teach the students the use of raspberry pi, about the workings, about the effectiveness of raspberry pi. As a result of these communities, report says there are growing interests inside students of various schools in States and Britain.

Raspberry Pi foundation has taken steps to accumulate software developers and teachers to give free training for the enthusiasts. The foundation has also started with their teacher training organizations to train the teachers in a more precise way. The course is aimed to update the teachers with the modern curriculums. It is known as ‘Picademy’.

Drawing of Raspberry Pi model B rev2
RaspberryPi Model, Image Credit – Efa at English WikipediaDrawing of Raspberry Pi model B rev2CC BY-SA 3.0

National Aeronautics and Space Administration (NASA) has also joined the campaign by launching an open source project. It is known as JPL Open Source Project and it is the miniature version of curiosity rover placed in mars. Raspberry pi controllers control the small model and inspires and encourages students to contribute to the project. Raspberry pi sensors also got involved in the project. It is one of the best examples of raspberry pi robot.

B. Home automation

Home automation is basically smart home which is controlled by automation system. Home automation can control and monitor raspberry pi security cameras, security systems of vaults, climate inside different rooms, power supply, all the home appliances (refrigerators, washing machines, microwave ovens, etc.) present inside the household, home theatres and all the entertainment system and what not! Raspberry pi is the heart behind the automation system and it controls the whole system. The economical cost has increased the demand for raspberry pi for the automation systems. There are developers and scientists researching to make more affordable automation system using raspberry pi.

C. Industrial automation

Raspberry pi models are cheaper for making automations systems. That is why many industrial companies have started with raspberry pi for their automation systems. Implementation of IoT is quite simpler using raspberry pi models. Networking and controlling of sensors, software and hardware can be efficiently done by raspberry pi. That is how modern industrial automation is becoming more advance and more secure. On the other hand, the controlling became easier than before.

In the year 2014, Mod Berry was released. Mod berry was released by TECHBASE (a famous automation builder company of Poland). It is a computer for industrial uses and it is built using raspberry pi compute model. This device has some added advantages like- RS-485/232 serial ports, 1 wire buses, etc. The computer got popularity as soon as it came into market.

Raspberry pi has also come up with different products of great usability. Raspberry pi camera or OTTO camera is a digital camera which was made by Next Thing Co. comes with some great features. It has a raspberry pi compute module to run the camera in efficient and desired way.

There are media player or raspberry pi media player developed by Slice. The digital player uses raspberry pi module as the core of the media player.

D. AI Assistant

Raspberry pi has recently tied knot with google to come up with hardware kits that will use Google’s cloud speech API and assistant software development kit for interpreting natural language or voices. That will not only make the devices more advanced but also will help the user to do certain tasks. That is how a raspberry pi will work as intelligent assistant or it can be called as raspberry pi Alexa. 

E. Photography

Raspberry pi module can help to capture some long-desired shots of many photographers. Raspberry pi No-IR camera works as artificially intelligent camera. A good quality camera with the no-IR filter camera of raspberry pi can be used to take some snaps from the night sky. The results will be much better than normal camera. Researches are still in progress to get more clarified results.

We have discussed some field related uses of the Raspberry Pi module. Let us be more specific and continue the discussion with some fantastic and cool science projects and ideas using raspberry pi module.

F. Raspberry pi web server

Raspberry pi can be used as webserver for the customers who needs it. However, raspberry pi cannot host a website with large base and high visitor counts but it’s perfect for new websites with low visitor counts. Three are web servers such as Apache, nginx and others for hosting large extensive websites. You will need a raspberry pi monitor for sure.

G. Raspberry pi drone

Emild has come out with a special structure using raspberry pi to control flight for new a Raspberry pi drone . To make a raspberry pi drone, one need to write the framework for autopilot. The job for Raspberry pi drone is now easily done by most of the raspberry pi model. The updated model of Raspberry pi by Emild has made it easier as it does not require to recreate the model. You can implement the innovative ideas in most of the Raspberry pi drone nowadays. Now raspberry pi drone can be used for most of the drone based operations and list is increasing daily.

Raspberry pi drone equipment’s

Tools need to make a raspberry pi drone are given in the below list.

640px Parrot Bebop Drone under
Raspberry pi drone, Image by – Maurizio Pesce from Milan, Italia, Parrot Bebop Drone (under)CC BY 2.0
  • Raspberry pi 4
  • NAVIO Kit (Built by Emild)
  • Motors
  • RC Controller
  • Raspberry pi battery
  • Adaptors
  • Micro SD Cards
  • USB cords
  • GPS system
  • 1045 props
  • PPM Encoders

H. Raspberry pi security camera

Earlier we have discussed home automation system using raspberry pi. Security camera is one of the most important parts of the system. This is not only for homes but also for industrial uses. A security camera is necessary for everywhere. Installing the system will allow you to watch live streams from the cameras and you can monitor the situations. It also records the video, so you can watch them latter too.

The list of tools needed for installing security camera using raspberry pi is given in the below list.

  • Raspberry Pi Module version – 3 and above
  • Raspberry pi camera (separately built for connecting with raspberry pi module)
  • Power supply
  • Micro SD card
  • Wi – fi module
  • Ethernet cable to connect the network

The steps for setup are as follow –

  1. Install the raspberry pi operating system using the micro SD card.
  2. Connect the Secure Shell or SSH (your local network).
  3. Connect the raspberry pi camera.
  4. Give access to Wi – Fi.
  5. Set up all your hardware components.
  6. Motion detection installation.
  7. Set up your pc for saving the videos in a particular folder and make sure the machine has space to store.
  8. Fix the motion AutoStart.
  9. Fix the camera at the desired place.
  10. Access the live stream.

I. Octoprint Raspberry pi

Octoprint is the web interface for 3D printers. Raspberry pi helps Octoprint to control and monitor the printing process with its own controller. Raspberry pi camera can help Octoprint in this matter.

Tools needed for the projects are –

  • Raspberry pi module version – 3 and above.
  • Micro Sd Cards.
  • USB cables.
  • Raspberry pi camera
  • 3d printed camera mount.

J. Coffee machine controllers using raspberry pi

There is n need to talk about the demand and popularity of a modern coffee machine in today’s era. Using an raspberry pi just add some more control and need less human interaction with the machine. It will set up warning when resource fell short, will give warnings for too much use, will give you estimation for bulky orders etc. The equipment needed to modify the coffee machine are noted below.

  • Raspberry pi module version 3 and above.
  •  Ultrasonic sensor
  • Cloud4Rpi software
  • Coffee Machine

K. LED controllers for raspberry pi

One of the very common yet popular project using raspberry pi is LED controllers. One can control and design LEDs with raspberry pi according their choices and requirements. One can select which light will be on for how much amount of time, or which light will be blinking using a simple raspberry pi module. The needed components are listed below.

  • Raspberry pi module of any version
  • LEDs
  • Resistors.
  • Breadboard
  • Jumper Wires.

What Is Raspberry Pi: 7 Answers You Should Know

ba9da4b0 0237 430e ae26 8270a09b083f CM4onWhite removebg preview 300x200 1

Topics of Discussion

  • Overview Of Raspberry Pi
  • Raspberry Pi Logo
  • Raspberry Pi Accessories & Hardware
  • Raspberry Pi Fan
  • Raspberry Pi Battery
  • Raspberry Pi Power Buttons
  • Raspberry Pi Shut Down Command

Overview

Raspberry pi is a small digital computer which has a wide range of applications in the field of modern technologies. It is a programmable device which can work as per requirement. The hardware ( main raspberry pi accessories) is implemented in a single board, and that is why the demand for it increasing exponentially. 

Raspberry Pi in the United Kingdom develops raspberry pi, and it is one of the bestselling computers in the world.

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A Raspberry Pi Model, Table – raspberry pi accessories, Image Source – Raspberry Organization

What is Raspberry Pi Drone? Check out other Raspberry Pi Applications!

Raspberry Pi accessories and Hardware

A typical raspberry pi accessories and important hardware are combination of a RAM, A CPU, GPU, USB hub, Ethernet chip, and the input-output port.

Processor

The microprocessor is the heart of the raspberry pi. First-generation raspberry pi uses BCM2835 SoC processor which has an s-processor, a GPU and a RAM unit. It has two cache level – primary and secondary level. The primary level cache has 16 KiB memory, and the second-level cache has 128 KiB memory. The secondary cache or the level 2 cache is associated with the GPU. The operational frequency of the processor stands at 700Mhz.

The preliminary version of Raspberry Pi 2, has a quad-core ARM cortex processor with a speed of 900 MHz. The level 2 cache memory limit is increased to 256KiB. The second version of Raspberry pi is updated with 1.2 GHz and 64-bit processor. The Broadcom BCM2836 Soc was brought back. The production of BCM2836 Soc was stopped before in 2016.

The raspberry pi 3 uses Broadcom BCM2837 Soc, and raspberry pi 4 uses Broadcom BCM2711 Soc. The speed of raspberry pi 3 stands at 1.2 GHz as it uses ARM Cortex – A53 processor and the rate of raspberry pi 4 stands at 1.5 GHz as it comes with ARM Cortex A72 processor.

The specification of processors for different versions, shown in the below table.

Model & versionProcessorBroadcom SocSpeedCache
Raspberry Pi ARM1176JZF-SBCM2835700 MHzL1 – 16 KiB L2 – 128 KiB
Raspberry Pi 2 V1.1ARM CORTEX-A7 (32 bit)BCM2836900 MHzL2 – 256KiB
Raspberry Pi 2 V1.2ARM CORTEX-A53 (64 bit)BCM28371.2 GHz 
Raspberry Pi 3 Model – BARM CORTEX-A53 (64 bit)BCM28371.2 GHz A+, B+ – 1.4 GHzL2 – 512 KiB
Raspberry Pi 4  ARM CORTEX-A72 (64 bit)BCM27111.5 GHzL2 – 1 MiB
Raspberry Pi accessories and Hardware

Know about microprocessors Here!

Raspberry Pi accessories
A detailed Image of Raspberry Pi and Hardware Image Source – raspberrypi.org

RAM

RAM is the main memory segment for raspberry pi. First generations of raspberry pi have RAM of 256 MiB- 128 MiB was for GPU and 128 MiB for CPU. The primary releases of the Raspberry pi RAM were separate able. 192 MiB memory was set for CPU. That much memory is enough for high-quality video decoding, 3D image processing. The 224 MiB was for the operating system that is Linux processing. Then another 128 MiB was for high load processing like – 3D processing.

Later there was a new model of ram size 512 MiB. It has specific split files.

The Raspberry Pi consists of 1 GiB Ram while Raspberry Pi 4 has RAM of 2, 4, 8 GiB of RAMS according to various model.

Networking

To connect with the internet, the ethernet port is there for Raspberry Pi 4 models. Previously there were no ethernet ports; instead, there were USB ethernet or Wi-Fi connectivity. Bluetooth connection is available for Raspberry Pi 3 and Pi Zero W., The version of the Bluetooth, is 4.1. The wi-Fi versions for those models are – 802.11n with 2.4 GHz bandgap.

Shape, Size & Weights

The increasing demand for Raspberry Pi is for its flexible size and small weight. It has a variety of sizes and can be easily fit into various electronics circuits. Raspberry Pi models are generally rectangular. A logo of raspberry pi is printed on the board. Weights and shapes of different Raspberry pi models are shown in the following table.

ModelR Pi 1 AR Pi 1 A+R Pi 3 A+R Pi 2 BR Pi 3 BR Pi 4 B  
Size85.6 mm X  56.5 mm65mm X 56.5 mm X 10 mm  65 mm X 56.5mm85.60 mm X 56.5 mm85.60 mm X 56.5 mm X 17 mm85.60 mm X 56.5 mm X 17 mm
Weight31 g23 g45 g45 g45 g46 g
Table2 – raspberry pi accessories

General Purpose Input- Output (GPIO) connector

One of the main features that have made Raspberry Pi so popular is the input-output pins. Almost every model of raspberry pi has the input-output pins. Raspberry Pi 1 models have 26 pins for both models A and model B. Models like A+ and B+ of version 1 have 40 pins. Raspberry pi 2 model B and all models of raspberry pi 3 has 40 pinouts. The specification table for the input-output pins is given below for further clarification.

PINGPIOFUNCTION
1 + 3.3 V
2 + 5 V
32SDA1 (I2C)
4 +5V
53SCL1 (I2C)
6 GND
74GCLK
814TXD0 (UART)
9 GND
1015RXD0 (UART)
1117GEN0
1218GEN1
1327GEN2
14 GND
1522GEN3
1623GEN4
17 + 3.3 V
1824GEN5
1910MOSI (SPI)
20 GND
219MISO (SPI)
2225GND
2311SCLK (SPI)
248CEO_N (SPI)
25 GND
267CE1_N (SPI)
270ID_SD (I2C)
281ID_SC (I2C)
295N/A
30 GND
316N/A
3212 
3313N/A
34 GND
3519N/A
3616N/A
3726N/A
3820DIGITAL IN
39 GND
4021DIGITAL OUT
Table3 – raspberry pi accessories

Raspberry pi fan

Raspberry pi model 4 comes with a case fan for its subsidiary models. It is specially designed for over clockers and other power consumers. It controls the temperature of the raspberry pi and thus made it more user friendly. The specifications of the fan are –

Input Voltage: 5V DC supplied via a general-purpose input-output header.

The fan speed is changeable.

Maximum airflow is 1.4 CFM.

CASE FAN007 800x533 removebg preview
Raspberry fans, Image Source – raspberrypi.org

Raspberry Pi battery

Raspberry pi models are fed into powers via an external cable which is connected with some power source. There is no in-built connection to place a battery inside the raspberry pi model. But now, there are several vendors for raspberry pi batteries. You just need to pick up the correct product for the model and connect it properly. It will be placed externally.

Raspberry Pi Power Buttons

There are no in-build power buttons for raspberry pi models. But there are ways to solve the problem. External power buttons can be added with the raspberry pi board to switch on and off the raspberry pi. Switching off the raspberry pi indicates that the model goes into HALT state for operation.

Note that raspberry pi accessories are necessary to build the power button externally.

Raspberry pi shutdown command

The raspberry pi model can be turned off (goes to halt state) using a specific command. If someone s using the command line or terminal windows, then type the following command –

sudo shutdown -h now.

Raspberry Pi Operating Systems

Raspberry pi runs using Linux Operating Systems. The specific version is known as ‘Raspbian’. It is a 32-bit operating system. Other types of OS can be operated using Micro or Mini SD cards.

Python and Scratch can be used as programming language though other languages have a scope too. The firmware (it is a software class which can control hardware of a specific device) is a closed structure, but there are unofficial opens sources available as well.

There are some other operating systems which are available in official websites. They include Ubuntu MATE, Windows 10 IoT Core, etc.

Some examples of Linux based OS and not Linux based OS are given in the below table.

Linux BasedNot Linux Based
Android ThingsRISC OS
Arch Linux ARM2.  FREEBSD
OpenSUSE3. NetBSD
SUSE Linux Enterprise (Server 12 SP2)4. Plan 9 from Bell Labs
Gentoo Linux5. Windows 10 IoT Core
Lubuntu6. Haiku
Xubuntu7. Helen OS
Devuan8. Broadcom VCOS
Kali Linux 
 Ark OS 
Tiny Core Linux 
Void Linux 
Fedora 
OpenWrt 
RetroPie 
 Postmarket OS 
 Alpine OS 
Table4 – raspberry pi accessories OS

APIS

API is a software known as Application Programming Interface. It is the link between two applications. It is a computing interface.

Video Core IV GPU can be used via binary blob for Raspberry Pi. The GPU code does the main work for the driver.

The firmware used by Raspberry Pi is a binary blob, and it is free of license.

There are also different third-part application software like – Astro Print, C/C++ Interpreter Ch, Mathematica, Minecraft, Real VNC, User Gate Web Filter, Steam link, etc.

The software inside the raspberry pi can be developed using various tools and raspberry pi accessories. Some of the tools are – Arduino IDE (Arduino programming),  BlueJ (Java beginners), Lazarus (Pascal IDE), Ninja IDE (python), TensorFlow (Machine learning and Deep learning framework developed by Google). etc.

Know More About APIs, Click Here!

Raspberry Pi Accessories

To operate a raspberry pi, there are specific devices that one need to use. Some of the raspberry pi accessories for beginners are –

  • DC motor,
  • motor driver,
  • LCD and Segment display,
  • light sensor,
  • temperature sensor,
  • Extra general-purpose input and output pins,
  • resistors,
  • rheostats,
  • capacitors,
  • transformers,
  • breadboard,
  • potentiometer,
  • jumper wires for connections, etc.

These raspberry pi accessories will help to use raspberry Pi to perform better in multiple real time applications.

Raspberry Pi Logo

The raspberry pi foundation organized a logo making competition for their product. On the 7th of October 2011, they declared the result. Paul Beech got the highest numbers of votes from the judges and won the competition. He makes the current logo.

Raspberry Pi Logo
Logo of R Pi, Image Credit: raspberrypi.org

51 Critical Digital Electronics MCQs For Competitive Exams

Digital MCQ 300x189 1

1. What is the number of outputs of a full adder circuit?

1) Two

2) Three

3) Four

4) One

Solution: 2) Three

How a full adder works? Check Here!

2. What is the expression for the sum(s) of a half adder if the inputs are A & B?

1) S = A OR B

2) S = A AND B

3) S = A XNOR B

4) S = A XOR B

Solution: 4) A XOR B

3. What is the sum(S) expression of a full adder if the inputs are A, B & C?

1) S = A OR B AND C

2) S = A AND B OR C

3) S = A XNOR B XOR C

4) S = A XOR B XOR C

Solution: 4) A XOR B XOR C

4. What is the result of the binary sum?

 10101 + 1011

Do you know how to perform binary addition in digital electronics? Click to know!

1) 1 0 0 0 0

2) 1 0 1 0 1 0

3) 1 0 0 0 0 0

4) 1 1 1 1 0 0

Solution: 3) 1 0 0 0 0 0

5. Which of these following logic gates gives a high output when both the inputs are low?

1) NOR gate

2) NOT gate

3) NAND gate

4) ALL OF THE ABOVE

Solution: 4) ALL OF THE ABOVE

6. Which of these following does not include in an ALU (Arithmetic Logic Unit)?

1) Adder

2) Subtractor

3) Multiplexer

4) None of the above

Solution: 3) Multiplexer

How a multiplexer works? Find out in detail!

7. which logic gate itself is a combinational circuit?

1) XOR

2) NAND

3) NOR

4) NOT

Solution: 1) XOR

8. How many bits does the sum of the full adder consists of?

1) Four bits

2) Three bits

3) Two bits

4) Five bits

Solution: 3) Two bits

9. A combinational circuit calculates the arithmetic sum in a parallel way. What is the name of the adder?

1) Sequential Adder

2) Parallel Adder

3) Serial Adder

4) Both 1) & 2)

Solution: 2) Parallel Adder

10. What is the primary object that is needed for VLSI technology?

1)  NOR gate

2) NAND gate

3) Both 1) and 2)

4) Gate array

Solution: 4) Gate array.

11. Choose whether the below-given statement is true or false.

Statement: A binary subtractor can be made using a binary adder.

  1. True
  2. False

Solution: (1). True

How binary adders can make binary subtractors! Click to know!

12. A circuit takes single input but provides multiple outputs. Identify which circuit it could be.

1) Multiplexer

2) Demultiplexer

3) Encoder

4) All of them

Solution: 2) Demultiplexer

13. What does a multiplexer do?

1) It takes multiple inputs and provides a single output.

2) It takes a single output and offers multiple outputs.

3) It inverts the input.

4) None of the above.

Solution: 1) It takes multiple inputs and provides a single output.

14. A half subtractor provides how many outputs?

1) One

2) Four

3) Three

4) Two

Solution: 4) Two

15. Mark the given statement as True or false.

Statement: An Encoder can be used as a transducer. 

  1. True
  2. False

Solution: (1). True

16. How does a priority set?

1) The lower the subscript number, the higher the priority.

2) The higher the subscript number, the lower the priority.

3) The higher the subscript number, the higher the priority.

4) None of the above.

Solution: 3) The higher the subscript number, the higher the priority.

17. Find out the result of the BCD addition.

0110 + 0101

1) 10001

2) 11001

3) 1011

4) 1111

Solution: 1) 10001

What is BCD Adder? Know Here!

18. Find out the result of the binary subtraction?

1101 – 1011

Do you know how to perform binary subtraction in digital electronics? Click to know!

1) 10001

2) 0010

3) 1011

4) 0001

Solution: 2) 0010

19. Mark the given statement as True or false.

Statement: The logical expression for both the full adders and full subtractors are the same.

  1. True
  2. False

Solution: (1). True

20. Which type of complement method is used for the decimal number system?

1) 10’s compliment

2) 8’s compliment

3) 9’s compliment

4) Both 1) and 3)

Solution: 4) Both 1) and 3)

21. How many select lines will be there if the inputs of a MUX are 8?

1) One

2) Four

3) Three

4) Five

Solution: 3) Three

22. How many select lines will be there if the inputs of a DEMUX are 4?

1) One

2) Five

3) Three

4) Two

Solution: 1) Two

23. Recording a video clip is which type of operation?

1) Multiplexing

2) De Multiplexing

3) Encoding

4) Decoding

Solution: 3) Encoding

24. A half binary adder is implemented using basic gates. How many and gates will be required?

1) One

2) Two

3) Three

4) Four

Solution: 1) One

25. Mark the given statement as True or false.

Statement: Multiplexers cannot implement Boolean functions.

  1. True
  2. False

Solution: (2). False

26. Which circuit can perform the increment operation of an ALU?

1) Adder

2) Subtractor

3) Both 1) and 2)

4) None of them

Solution: 3) Both 1) and 2)

27. Mark the given statement as True or false.

Statement: Technologies like TDM, FDM, CDMA, etc., uses multiplexers and demultiplexers.  

  1. True
  2. False

Solution: (1). True

28. A decoder has an output of 2n. How many inputs does it consume?

1) n

2) 2n

3) 2n – 1

4) n-1

Solution: 1) n

29. Which type of basic gates is most necessary for Encoders?

1) OR gates

2) AND gates

3) NOT gates

4) All of the above

Solution: 1) OR gates

30. Mark the given statement as True or false.

Statement: DTMF is Diode Time Multiplexer Frequency. 

  1. True
  2. False

Solution: (2). False. DTMF – DUAL TONE MULTIPLE FREQUENCY.

31. What is the lowest number of NAND gates required for a half subtractors?

1) Four

2) Five

3) Six

4) Seven

Solution: 2) Five

32. A decoder has four input lines. How many output lines will be there?

1) Eight

2) One

3) Four

4) Sixteen

Solution: 4) Sixteen

33. Mark the given statement as True or false.

Statement: An encoder takes multiple data inputs and converts them into a single output with select lines. 

  1. True
  2. False

Solution: (2). False

34. What is min-term?

1) Product of sum

2) Sum of product

3) Product of product

4) Sum of the sum

Solution: 1) Product of sum

35. Find the application of a MUX.

1) It is used in Analog to Digital converters and Digital to analog converters in digital electronics.

2) It is used in rectifiers.

3) It is used in filters.

4) None of the above is correct.

Solution: 1) It is used in Analog to Digital converters and Digital to analog converters in digital electronics.

36. Mark the given statement as True or false.

Statement: An operation in Flip Flop is faster than an operation in the multiplexer.

  1. True
  2. False

Solution: (2). False

37. Which IC works as a multiplexer?

1) 74HA198

2) 74HC150

3) 74CH199

4) 74HC157

Solution: 4) 74HC157

38. Which IC works as a demultiplexer?

1) 74HC83

2) 74HC38

3) 74CH19

4) 74HC15

Solution: 1) 74HC83

39. Which IC works as Encoder?

1) HT85A

2) HT87B

3) HT12E

4) HT74F

Solution: 3) HT12E

40. What is the lowest no. of OR gate required for the given expression?

Y = A’B + B’A

1) 1

2) 2

3) 4

4) 5

Solution: 1) 1

41. What is the lowest no. of AND gate required for the given expression?

Y = A’B + B’A

1) 1

2) 2

3) 4

4) 5

Solution: 2) 2

42. What is the lowest no. of NAND gates required to make an inverter?

1) 1

2) 2

3) 3

4) 4

Solution: 1) 1

43. What is the lowest no. of NOR gates required to make an OR gate?

1) 1

2) 2

3) 3

4) 4

Solution: 2) 2

44. Which gates are known as universal gates in digital electronics ?

1) OR and AND

2) NOT and XOR

3) NOR and NAND

4) All of them

Solution: 3) NOR and NAND

45. A truth table is given below where A and B are the provided inputs, and from Y the output is taken. Identify the Logic gate.

Table 1
Digital Electronics MCQ Table – 1

1) XOR

2) NAND

3) XNOR

4) NOR

Solution: 3) XNOR

46. A truth table is given below where A and B are the provided inputs, and from Y the output is taken, for a digital electronics circuitry. Identify the Logic gate.

Table 2
Digital Electronics MCQ Table – 2

1) XOR

2) NAND

3) XNOR

4) NOR

Solution: 4) NOR

47. Find the odd one out from the digital electronics circuitry.

1) MULTIPLEXER

2) FLIP/FLOPS

3) REGISTERS

4) COUNTERS

Solution: 1) MULTIPLEXER

48. What is the lowest no. of NOT gate required for the given expression?

Y = A’B + B’C + AC

1) 1

2) 2

3) 3

4) 4

Solution: 1) 1

49. Find the odd one out.

1) DEMULTIPLEXERS

2) ENCODERS

3) HALF ADDERS

4) FULL SUBTRACTORS

Solution: 1) DEMULTIPLEXERS

50. A truth table is given below where A and B are the provided inputs, and from Y the output is taken, for a digital electronics circuitry. Identify the combinational circuit.

ABY
LOWLOWLOW
LOWHIGHHIGH
HIGHLOWHIGH
LOWLOWLOW
Digital Electronics MCQ Table – 3

1) SUBTRACTOR

2) MULTIPLEXER

3) ADDER

4) Both 1) and 3)

Solution: 4) Both 1) and 3)

Digital MCQ
Digital Electronics MCQ
Conclusion : With these we are done with the critical Digital Electronics MCQs and To learn more on Digital Electronics Article and Question Answers click here

Encoder & Decoder Circuit:Definition,Working,5 Applications

8 3 Encoder 300x141 1

Encoder Definition

An encoder is a digital combinational circuit that converts binary information of maximum 2n input lines into n output lines. The correspondent input binary value generates the output lines.

Encoder Circuit

8 3 Encoder
Encoder Circuit, Image Source –Nitianabhigyan8-3 EncoderCC BY-SA 4.0

Example of an encoder:

Octal to Binary Encoder

It has inputs for each of the octal digits that is a total of eight in number. It has three output lines (according to the rule that the 2n input line encoder will have n output line). The outputs represent the numbers in binary.

The encoder can be implemented using OR gates. Output C is equal to 1 if the octal digit’s value is 1, 3, 5, 7. The output B will be one if the octal number has a value of 2, 3, 6, 7. The output AS will be one if the input octal digits’ value is 4, 5, 6, 7. The following Boolean expressions represent the outputs.

A = O4 + O5 + O6 + O7

B = O2 + O3 + O4 + O7

C = O1 + O3 + O6 + O7

O0O1O2O3O4O5O6O7ABC
10000000000
01000000001
00100000010
00010000011
00001000100
00000100101
00000010110
00000001111
Octal to Binary Encoder Truth Table

The encoder implemented at the table has the only limitation. That is, only one input can be in active mode at any given time. That is why if two inputs are made active, then the output lines produce undefined outputs.

Let us take an example if the input O3 is in an active state as well as input O6 is also in an active state, then the encoder produces output as 111. The result neither represent O6 nor O3. So, there is a mess.

To solve this problem, new encoders are designed with an input priority to make sure that only one input gets enabled at a time. If priority is set high for higher digits in this new system, then for enabled O3 and O6, the output will be 110, representing 6 in binary. This happens as O6 has a higher priority than O3.

Priority Encoder

 A priority encoder is a particular type of encoder circuit which has a priority function for the inputs. The priority function works in the real world. For example, if there is a queue and you have a high priority, you go first! If there is an operation where both the input values are 1, then the 1 with the highest priority will take precedence.

O0O1O2O3ABY
0000XX0
1000001
X100011
XX10101
XXX1111
Truth Table for Priority Encoder

As we can see from the truth table of the priority encoder, it has three outputs. Two are general outputs; another one, Y, is a valid bit indicator.

The right bit indicator is set to 1 when one or more than one input has a value of 1. If there are such conditions, where all inputs are set to 0 or the information is not valid, then Y also becomes 0. There is no checking of other outputs if the Y term is 0.

Then, they are specified as don’t-care terms. Truth tables use don’t-care words to represent 0 or 1 rather than listing up 16 terms for variables. For example, 100X means either 1000 or 1001.

As mentioned earlier, the higher the subscript number, the priority of the number gets high. From the truth table, we can see that input O3 has the highest priority as the input. That is why whatever the values for other input digits when the O3 value is 1, the output becomes 11. Similarly, O2 has a priority lower than O3 and higher than O1 and O0. When the input of O2 is 1, the result will be 10. In the same way, for O1, the output is 01, and for O0, the outcome will be 00.

The Boolean function for the priority encoder will be:

A = D2 + D3

B = D3 + D1 D2’

Y = D0 + D1 + D2 + D3

priority
Priority Encoder Circuit, Image Source – NitianabhigyanA 4-2 Priority Encoder CC BY-SA 4.0

How does a priority encoder circuit differ from multiplexer? Read Here!

DECODERS

Definition and Overview

A decoder is a combinational circuit that does the opposite operation of an encoder circuit. It decodes or simplifies the encoded information from n input lines to a maximum of 2n output lines.

Decoder Circuit

Decoder
Decoder Circuit and Truth Table, Image Source –BlueJester0101Decoder ExampleCC BY-SA 3.0

Binary codes represent information of distinct quantities. An n bit binary code can represent a maximum of 2n different elements of encoded data. A decoder decodes that information and provides the output.

Decoders are specified as numbers of input to numbers of output line decoders. If the number of input lines is n, then there will be a maximum of 2n output. Every single input combination produces a distinct output value.

To illustrate the working of a decoder, let us take the example of a 3:8 decoder. The specification suggests that the circuit will decode the three input lines into eight outputs of every single output represents the min-terms. The connected NOT gates inverts the input data lines whenever necessary. The AND gates (total eight in number) produces the min-terms (each for one output).

ABCO0O1O2O3O4O5O6O7
00010000000
00101000000
01000100000
01100010000
10000001000
10100000100
11000000010
11100000001
Decoder Truth table

From the truth table, we can observe that seven outputs have a value of 0 and one output, which have a value of 1. The outcome, which has a value of 1, represents the actual input value or the min-term.

There are decoders that are constructed with universal basic gates like NAND and NOR. Using a NAND gate is economical as well as efficient to build a decoder.  Decoders also need to enable inputs like encoders. The decoder gets enabled when the enable input pin has a value of 0. Only one output may have a value of 0 at a time, and the rest of the outputs will be equal to 1. The truth table below simplifies the operation.

EnableABO0O1O2O3
1XX1111
0000111
0011011
0101101
0111111

The circuits get disabled if the E value is set to 1. Like the encoder circuit, if the E value is set to 1, there will be no checking of other inputs. In the disabled state of the decoder, no outputs have the value 0, and no min-term is elected. Many decoders have more than one enables pin. They need to abide by the logical operations to perform as a decoder.

A demultiplexer can be made using a decoder if the decoder is added with enable inputs. Parallelly corresponding decoders can make large decoders.

Implementation of logic using decoders

A decoder has 2n input data lines and n output lines. 2n represents the minterms, and n represents the number of variables using which the minterms are formed. As mentioned earlier, for each combination of inputs, there are different outputs.

A decoder can be used to implement logic gates as Boolean functions are nothing but the sum of minterms. An OR gate connected with a decoder can implement the logic of a Boolean function.

Decoder
Decoder with an enable

Applications of Encoders and Decoders

Encoder circuit and decoder circuit have applications in smart digital devices as they are significant for today’s’ digital era.

Some of the significant applications are –

  1. Speed Control of modern motors.
  2. Night vision cameras
  3. Metal detectors
  4. encoder circuit has applications in Robotic vehicles
  5. Automation system – especially the home automation system.
  6. Automatic Monitoring systems has different types of encoder circuits.
  7. Encoder circuit has utilized in encrypted communications system.

7 Facts On Multiplexer And Demultiplexer: Beginner’s Guide !

  • Definition & Overview of Multiplexer
  • Operation & Analysis
  • Implementation of Boolean Function using MUX
  • DEMUX
  • Application of MUX-DEMUX

Definition:

A digital multiplexer is a device that takes more than one inputs and outputs a single selected data. Just like an adder and subtractor, a multiplexer is also a combinational device.

It is also identified as a data selector as it pick out one of several inputs and sends it to the output with the help of a control signal or select lines. If a typical MUX has 2n input lines, then there will be n choose lines. The bit combination of select lines determines which output will be produced.

2:1 MUX Definition:

A 2:1 MUX signify that the multiplexer has two input and one output. It also has one select line as S. If S =0, the upper AND gate are ON, and I0 appears at the o/p, and if the S =1, the lower AND gate is ON and I1 appears at the o/p. MUX acts like a switch which chooses one out of two available input.

Multiplexer 2 to 1
A 2:1 Multiplexer with the Boolean equation, Image source – en:User:CburnettMultiplexer 2-to-1CC BY-SA 3.0

4:1 MUX Definition:

A 4:1 MUX means that the multiplexer has four input lines and one output line. It has two select lines as S0 and S1. There are several AND gates to produce the output. Select lines are connected with the correspondent AND gates. The result of AND gates are connected to a single OR gate.

If the select lines give the binary code as 10, that is, S1 = 1 and S0 = 0, then the AND gate connected with input I2 has two of its inputs equal to value 1, and the last one is connected with I2. The other three AND gates have at least one input equal to zero, this correspondingly changes their output equal to zero. Here and now, the outcome of the OR gate is analogous to the value of I2 and allows the designated input to look as if at the result. 

Multiplexer 4 to 1
A 4:1 Multiplexer block diagram, Image by – en:User:CburnettMultiplexer 4-to-1CC BY-SA 3.0

Operation & Analysis

A multiplexer is very much similar to a decoder. The AND gates and the NOT gates bring the similarity between a decoder and multiplexer. Meanwhile, a MUX truly decodes the select lines and provides the output. A multiplexer can also be constructed from a decoder. If 2n input lines – each to AND gate are added up with an n to 2n decoder, the circuit will work as a multiplexer.

The multiplexer size depends on the data input lines that are 2n and the single output line. The number of selection lines will be n for a 2n input line mux. Like a decoder, a mux may also have an enable input line. The outputs will be disabled if the enable input is in an inactive state. When the enable pin is in an active state, the MUX will work as usual.

There are efficient techniques to be responsible for multiple bit selection-logic. If the multiplexer circuits are combined with standard selection inputs, the numerous bit selection can be implemented. To implement this, a quadruple 2:1 mux is shown in the below image.

MUX
Quadruple MUX

Here, the circuit has four multiplexers, and they are 2:1 mux. The output Y0 can be selected from input A0 or B0. Similarly, the output of Y1 can be selected from input A1 or B1, and it continues for the rest of the circuit. The select lines S selects one of the lines for each of the multiplexers. The enable input must be in an active state to operate the multiplexers.

Though the circuit has a 2:1 multiplexer for operation, it looked like a circuit that pick out anyone of the two 4 -bit sets of data line. Now, when the enable is 0, and the select line is also 0, the four an inputs can appear as the output. Also, if the s=1, then the B inputs appear at the result. The outcomes will be 0 when the enable pin is set to 0, no matter the value of select lines.

Implementation of Boolean Function using MUX

Boolean functions can also be implemented using multiplexers. The min-terms of a function can be generated in a multiplexer with the circuit connected with the selection lines. The data inputs can select separate min-terms. This is how implementations of n variable function are possible for a multiplexer of input data lines of 2n and n select lines. The input data lines will be used for each min-term.

A more efficient way to implement Boolean expression is also available. A function of n variables can be implemented with a multiplexer having n-1 lines. The first n-1 variable is utilized as selection inputs. The remaining variable of the operation is used for data inputs. If each data input denotes the remaining variable, the mux will be a, a’, 1, or 0.

We can take the example of a Boolean algebra.

F (a, b, c) = ∑ (1, 2, 3, 4)

The function of three variables can be implemented with a 4:1 MUX, as shown below.

BOOLEAN MUX
Implementation of Boolean Functions

The two variables, a and b, are applied to the select lines in a certain order. The a  is connected to the S1 input, and b is linked with the S0 input. The truth table of the function determines the values for the input lines of the MUX. When ab = 00, output F is equal to c as F = 0 when c = 0 and F = 1 when c = 1. Data input 0 requires the input for variable c.

The multiplexer works in a certain way. When the value of ab is zero, then the data input 0 appears at the output. Thus, the output becomes equal to c. The data lines 1, 2, 3 also required inputs and can be determined similarly. The inputs are derived from the function F, and the inputs are ab = 01, 10, 11.We can find out the inputs for the data lines by this explanation.

This example shows the typical steps to implement Boolean functions consisting of n variables with the help of a multiplexer with n – 1 selectionline and 2n-1 dataline. The truth table of the Boolean function is described initially. The primary n-1 variables of the process given are applied to the selection input of the MUX. The output is calculated as the last variable’s function for every single combination of the selection lines. The process has a specific set of values. The function’s value can be 0 or 1, or the variables or the complement of the variables.

Now let us take an example of a more considerable Boolean function.

F (A, B, C, D) = ∑ (1, 3, 5, 7, 9, 11, 13, 15)

A multiplexer can implement this Boolean function with three select lines and eight input lines (Basically an 8:1 MUX). The MUX is shown in the image.

BOOLean MUx 2
8 x 1 MUX

Now, the first variable that is A, should be connected to the select line S2 to make sure the correspondent select lines for B and C becomes S1 and S0. The truth table of the function is depicted as mentioned earlier. The values for the input lines for the MUX is calculated from that truth table. The data line number is determined by the binary combinations of the variable ABC.

If ABC = 101, then F comes as D. Form this, it can be calculated that data input line 5 receives input as D. Logic 0 and logic 1 are two fixed values. Logic 0 means logic low or equivalent to ground, and logic 1 means logic high or the input power signal.

Three State Gates

The construction of a multiplexor is possible using three-state gates. Three state gates are the digital circuitries that can operate in three states. Two out of those three states are 0 and 1 conventionally, and the third state is known as the high impedance state. At the high impedance state, the logical procedure performs like an open circuitry. Three state gates can perform all types of logical operations, such as NOT or NOR. The most common use of a three-state gate is as a buffer gate.

As said earlier, multiplexers can be constructed using three-state buffers. The image below describes the implementation of a 2:1 mux with two three-state buffer and a NOT gate. The two outputs are connected for providing a single result. When the select line is valued as zero, the upper pad gets activated, and the lower one gets disabled. A appears at the output, and when the select input is 1, the reverse happens, and B appears at the result.

DEMUX

A DEMUX or de-multiplexer is a digital device that does the opposite of a multiplexer. It takes a single input and provides multiple outputs with the help of select lines. If a DEMUX has n select lines, then the numbers of production will be 2n. A diagram of 4:1 DEMUX is given below.

A Demultiplexer , Image Credit – FresheneeszDemultiplexerCC BY-SA 3.0

MUX & DEMUX Applications:

MUX and DEMUX have importance in today’s digital era. Some of their applications are –

Mux-Demux,Image – Tony R. Kuphaldt, Telephony multiplexer systemCC BY 1.0
  • Communication System: MUX and DEMUX have the most extensive applications in the field of communication systems. MUX allows transmitting distinct types of data like – audios and video, images, voice recordings, etc. can be multiplexed into a single transmission channel. It increases the efficiency of the system.
  • Telephonic System: Telephone networks need both MUX and DEMUX. Technologies like – Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM), Code Division Multiple Access (CDMA), etc., are possible only because of MUX and DEMUXs.
  • MUX and DEMUXs are also used in logic gates for combinational circuits and many other digital devices.