Multiplexer – Demultiplexer |It’s Complete Analysis, important Applications

Points of Discussion

  • Definition & Overview of Multiplexer
  • Operation & Analysis
  • Implementation of Boolean Function using MUX
  • Application of MUX-DEMUX

Definition & Overview

A digital multiplexer is a device that takes more than one inputs and outputs a single selected data. Just like an adder and subtractor, a multiplexer is also a combinational device.

It is also identified as a data selector as it pick out one of several inputs and sends it to the output with the help of a control signal or select lines. If a typical MUX has 2n input lines, then there will be n choose lines. The bit combination of select lines determines which output will be produced.

2:1 MUX

A 2:1 MUX signify that the multiplexer has two input and one output. It also has one select line as S. If S =0, the upper AND gate are ON, and I0 appears at the o/p, and if the S =1, the lower AND gate is ON and I1 appears at the o/p. MUX acts like a switch which chooses one out of two available input.

A 2:1 Multiplexer with the Boolean equation, Image source – en:User:CburnettMultiplexer 2-to-1CC BY-SA 3.0

4:1 MUX

A 4:1 MUX means that the multiplexer has four input lines and one output line. It has two select lines as S0 and S1. There are several AND gates to produce the output. Select lines are connected with the correspondent AND gates. The result of AND gates are connected to a single OR gate.

If the select lines give the binary code as 10, that is, S1 = 1 and S0 = 0, then the AND gate connected with input I2 has two of its inputs equal to value 1, and the last one is connected with I2. The other three AND gates have at least one input equal to zero, this correspondingly changes their output equal to zero. Here and now, the outcome of the OR gate is analogous to the value of I2 and allows the designated input to look as if at the result. 

A 4:1 Multiplexer block diagram, Image by – en:User:CburnettMultiplexer 4-to-1CC BY-SA 3.0

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Operation & Analysis

A multiplexer is very much similar to a decoder. The AND gates and the NOT gates bring the similarity between a decoder and multiplexer. Meanwhile, a MUX truly decodes the select lines and provides the output. A multiplexer can also be constructed from a decoder. If 2n input lines – each to AND gate are added up with an n to 2n decoder, the circuit will work as a multiplexer.

The multiplexer size depends on the data input lines that are 2n and the single output line. The number of selection lines will be n for a 2n input line mux. Like a decoder, a mux may also have an enable input line. The outputs will be disabled if the enable input is in an inactive state. When the enable pin is in an active state, the MUX will work as usual.

There are efficient techniques to be responsible for multiple bit selection-logic. If the multiplexer circuits are combined with standard selection inputs, the numerous bit selection can be implemented. To implement this, a quadruple 2:1 mux is shown in the below image.

Quadruple MUX

Here, the circuit has four multiplexers, and they are 2:1 mux. The output Y0 can be selected from input A0 or B0. Similarly, the output of Y1 can be selected from input A1 or B1, and it continues for the rest of the circuit. The select lines S selects one of the lines for each of the multiplexers. The enable input must be in an active state to operate the multiplexers.

Though the circuit has a 2:1 multiplexer for operation, it looked like a circuit that pick out anyone of the two 4 -bit sets of data line. Now, when the enable is 0, and the select line is also 0, the four an inputs can appear as the output. Also, if the s=1, then the B inputs appear at the result. The outcomes will be 0 when the enable pin is set to 0, no matter the value of select lines.

Implementation of Boolean Function using MUX

Boolean functions can also be implemented using multiplexers. The min-terms of a function can be generated in a multiplexer with the circuit connected with the selection lines. The data inputs can select separate min-terms. This is how implementations of n variable function are possible for a multiplexer of input data lines of 2n and n select lines. The input data lines will be used for each min-term.

A more efficient way to implement Boolean expression is also available. A function of n variables can be implemented with a multiplexer having n-1 lines. The first n-1 variable is utilized as selection inputs. The remaining variable of the operation is used for data inputs. If each data input denotes the remaining variable, the mux will be a, a’, 1, or 0.

We can take the example of a Boolean algebra.

F (a, b, c) = ∑ (1, 2, 3, 4)

The function of three variables can be implemented with a 4:1 MUX, as shown below.

Implementation of Boolean Functions

The two variables, a and b, are applied to the select lines in a certain order. The a  is connected to the S1 input, and b is linked with the S0 input. The truth table of the function determines the values for the input lines of the MUX. When ab = 00, output F is equal to c as F = 0 when c = 0 and F = 1 when c = 1. Data input 0 requires the input for variable c.

The multiplexer works in a certain way. When the value of ab is zero, then the data input 0 appears at the output. Thus, the output becomes equal to c. The data lines 1, 2, 3 also required inputs and can be determined similarly. The inputs are derived from the function F, and the inputs are ab = 01, 10, 11.We can find out the inputs for the data lines by this explanation.

This example shows the typical steps to implement Boolean functions consisting of n variables with the help of a multiplexer with n – 1 selectionline and 2n-1 dataline. The truth table of the Boolean function is described initially. The primary n-1 variables of the process given are applied to the selection input of the MUX. The output is calculated as the last variable’s function for every single combination of the selection lines. The process has a specific set of values. The function’s value can be 0 or 1, or the variables or the complement of the variables.

Now let us take an example of a more considerable Boolean function.

F (A, B, C, D) = ∑ (1, 3, 5, 7, 9, 11, 13, 15)

A multiplexer can implement this Boolean function with three select lines and eight input lines (Basically an 8:1 MUX). The MUX is shown in the image.

8 x 1 MUX

Now, the first variable that is A, should be connected to the select line S2 to make sure the correspondent select lines for B and C becomes S1 and S0. The truth table of the function is depicted as mentioned earlier. The values for the input lines for the MUX is calculated from that truth table. The data line number is determined by the binary combinations of the variable ABC.

If ABC = 101, then F comes as D. Form this, it can be calculated that data input line 5 receives input as D. Logic 0 and logic 1 are two fixed values. Logic 0 means logic low or equivalent to ground, and logic 1 means logic high or the input power signal.

Three State Gates

The construction of a multiplexor is possible using three-state gates. Three state gates are the digital circuitries that can operate in three states. Two out of those three states are 0 and 1 conventionally, and the third state is known as the high impedance state. At the high impedance state, the logical procedure performs like an open circuitry. Three state gates can perform all types of logical operations, such as NOT or NOR. The most common use of a three-state gate is as a buffer gate.

As said earlier, multiplexers can be constructed using three-state buffers. The image below describes the implementation of a 2:1 mux with two three-state buffer and a NOT gate. The two outputs are connected for providing a single result. When the select line is valued as zero, the upper pad gets activated, and the lower one gets disabled. A appears at the output, and when the select input is 1, the reverse happens, and B appears at the result.


A DEMUX or de-multiplexer is a digital device that does the opposite of a multiplexer. It takes a single input and provides multiple outputs with the help of select lines. If a DEMUX has n select lines, then the numbers of production will be 2n. A diagram of 4:1 DEMUX is given below.

A Demultiplexer , Image Credit – FresheneeszDemultiplexerCC BY-SA 3.0

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Applications of MUX & DEMUX

MUX and DEMUX have importance in today’s digital era. Some of their applications are –

Mux-Demux,Image – Tony R. Kuphaldt, Telephony multiplexer systemCC BY 1.0
  • Communication System: MUX and DEMUX have the most extensive applications in the field of communication systems. MUX allows transmitting distinct types of data like – audios and video, images, voice recordings, etc. can be multiplexed into a single transmission channel. It increases the efficiency of the system.
  • Telephonic System: Telephone networks need both MUX and DEMUX. Technologies like – Frequency Division Multiplexing (FDM), Time Division Multiplexing (TDM), Code Division Multiple Access (CDMA), etc., are possible only because of MUX and DEMUXs.
  • MUX and DEMUXs are also used in logic gates for combinational circuits and many other digital devices.

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About Sudipta Roy

I am an electronics enthusiast and currently devoted towards the field of Electronics and Communications.
I have a keen interest in exploring modern technologies such as AI & Machine Learning .
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