Introduction To MOSFET: 11 Important Explanations

Topic of Discussion: MOSFET basics

What is MOSFET?

Definition of MOSFET:

The Metal-oxide-semiconductor field-effect-transistor (MOSFET), is a form of insulated gate field effect transistor that is made-up by the controllable oxidised silicon based semiconductors”.

Different types of MOS:

  • ·        P Channel MOSFET
  • ·        N Channel MOSFET

Different types of MOSFET devices:

  • ·        Enhancement Mode MOSFET
  • ·        Depletion Mode MOSFET


MOSFET basics : MOSFET Symbol

Working Principle of MOSFET:


A FET is worked as a conductive  semiconductor channel with 2 contacts – the ‘SOURCE ‘ and the DRAIN. The GATE juntion might be comprehended as a  2 -terminal circuitry as a MOS structure working as a rectifing reverse biasing mode. Usually, the GATE  impedance is higher in classic working situations.

The FETs as per these standards are typically MOSFET, JFET,  metal-semiconductor FET (MESFET), and heterostructure FET. Out of these FET, MOSFET is one of the significant one and commonly utilized for various applications.

In a silicon  based MOSFET, the GATE terminal is normally insulated by a specific SiO2 layer. The charge carriers of the conductive channel develop an opposite charge,  e-  in that case, p-type substrate for an n-channel and ‘holes’ for n-type substrate  for the p-channel. This will induced in the semiconductor at the silicon-insulator edge by the applied volt in GATE terminal. The e- will enter and depart the channel at n+ source and drain terminals cotacts for an n-channel metal-oxide-semiconductor field-effect-transistor.  This will be  p+ contacts during the  p-type Metal-oxide-semiconductor field-effect-transistor.

MOSFET basics : A typical MOSFET chip with heat sink
Image credit: WilltronTransistor y disipadorCC BY-SA 3.0

MOSFET layer

MOSFET basics : MOSFET layers in Metal–oxide–semiconductor structure on p-type silicon Image Credit :MOS_Capacitor.pngBrews ohare derivative work: Fred the Oyster (talk), MOS CapacitorCC BY-SA 3.0

Implementation of MOSFET:

Metal-oxide-semiconductor field-effect-transistors are working as discretized circuit and also as an active element. At the present time, these circuits are scaled down into the deep sub micro meter range. At the moment, the standard 0.13-µicro meter standard technology node CMOS is utilized for VLSI technology and, in future 0.1-µicro meter technology will be existing, with a certain upgradation of speed and integration range.

CMOS technology associates with the n-channel and p-channel Metal-oxide-semiconductor field-effect-transistor to consume very less power without constraining the performing speed. New SOI technology accomplish three dimentional integration with multiple layers, with a electrifying increase in integration stupidity. Novel and enriched structures and the combination of Bi-CMOS technology possibly will lead to further enhancements. One of the emerging areas of CMOS is across a variability of applications from audio device of  kHz range to modern wireless application operated at GHz range.

MOSFET basics : MOSFET Regions, Image Credit – Cyril BUTTAY, Lateral mosfetCC BY-SA 3.0

Short channel Effect in MOSFET:

Usually FET sizes are assessed by the device aspect ratio. This is the ratio of the gate length in respect of active vertical measurement of FET. The perpendicular dimension for the oxide breadth is measured as parameter di, the source and drain junction depths is considered as parameter rj.  The source and drain junction depletion depths are diefined by the parameter Ws and Wd respectively. The low aspect ratio is identical with short channel characteristics.

                 L<Lmin(µm) = 0.4[rj(µm)di(Å)(Wd + Ws)2(µm2)]1/3

When L is less than Lmin,.

The Metal-oxide-semiconductor field-effect-transistor threshold voltage is consederd as VT . This voltage will be impacted in a number of ways as a result of gate control. Generally, depletion charges near-source and drain are under the common control. The charge will develop a moderately higher portion of the GATE charge carrier. The depletion charge near drain inflates with increasing drain-source biasing voltage, causing in an additional VDS-dependent shift in threshold voltage .

The VT is a sort of barrier combined with carrier injected from the source to channel direction. This barrier is considerably adjusted by use of a drain biasing voltage. In n-channel Field effect transistors, the drain is dropping the threshold voltage and a concurrent rise in the threshold current with growing VDS.

High Field Effect of MOSFET:

In case of drain-source biasing of a Field effect transistor grow towards the drain saturation voltage which termed as ‘VSAT’ wherever a range of higher electric field  is created near by  drain. The  velocity of e-  in that region will saturates. In saturation region, the length considered as ∆L of the high-field  increases in the course of the source with growing VDS, and the performs as if the in effect channel length is decreased  by the parameter ∆L. This phenomenon is entitled as the Channel-length modulation  or  simply termed as CLM in the MOSFET basics. The subsequent simplified manifestation links of VDS to the length of the saturated region is as follows:

                                             VDS = VP + Vα [exp(l/l)-1]]

wherever Vp, Vα, and l are parameters interrelated to the e- saturation velocity. Here, Vp is the potential at the point of saturation in the channel, that is commonly estimated by the parameter VSAT.  Ths agreement is obtained amongst the potential summary which is acquired from the 2D simulation model of an N-channel MOSFET.

Hot Carrier Effects:

Hot-carrier effect is one of  the most important concerns when shrinking FET size into the deep sub micrometre.It decreases the channel length while maintaining high power supply levels. These are increased  to electric field strengths and reasons  of speed up and heating the charged carriers. A comprehensive model for the substrate current is very difficult for circuit-level modelling.

Temperature Dependence and Self-Heating:

The MOSFET basics circuitry is functional in different environs, including different temperatures ranges. Heat created from power dissipation in a circuitry is also significant and the increase in temperature for circuit design is also needed to be considered. The design turns out to be more and more difficult as the device size is becoming very small and power dissipation are increasing with different mode of operation. The thermal characteristics are extensively studied by various models.

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Soumali Bhattacharya

I am currently invested in the field of Electronics and communication. My articles are focused towards the major areas of core electronics in a very simple yet informative approach. I am a vivid learner and try to keep myself updated with all latest technologies in the field of Electronics domains. Let's connect through LinkedIn -

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